Field Programmable Analog Array
Electronics is a critical area in the push for smaller
and lower powered spacecraft and instruments. In the past several years APL
has proved in our internal IRAD program that radiation-hardened CMOS VLSI technology
can be used for both analog and digital functions (mixed-mode) to achieve electronics
miniaturization and reduce power by an order of magnitude. Given such results,
it is obviously desirable to have a much larger fraction of discrete components
being replaced with mixed-mode ASICs in spacecraft electronics. Space qualification
and especially radiation hardness of new developments is always an issue, requiring
the use of dedicated rad-hard foundries. Since mixed-mode ASICs is a new area,
it requires custom development of new foundry specific building blocks, through
specialized CAD tools. The development includes transistor level design, simulation,
layout, fabrication and testing of functional blocks. A critical component to
success in this area is circuit simulation based on properly calibrated transistor
level models, which must be precise over ranges of temperature and radiation
level typical of spacecraft. Thus a complete new design environment must be
developed, analogous to that for FPGAs, to allow NASA designers to interconnect
cell layouts from a library instead of transistor level layouts to develop mixed-mode
subsystems on a chip.
Front-End Energy ASIC
Energy measurement is a basic function for many types of instruments such as
particle, gamma-ray, or x-ray instruments. An ASIC can support a number of input
and output data paths, called channels. A single channel includes a low noise
preamplifier, a shaping amplifier, a peak detector, and a direct analog output
or ADC. Several of these channels may be combined on a single chip to allow
simultaneous processing of parallel signals.
Time-to-Digital Converter
Time of Flight measurement is a basic function for many type instruments such
as particle spectrometers, delay line imaging, and laser rangefinding, and can
be a basic computational function for signal processing, such as ADC. Generally
a TOF system consists of the analog start and stop timing amplifiers (TA), a
fast comparator or a constant fraction discriminator (CFD), a time to digital
converter (TDC), valid event logic, and read out.
A first TOF ASIC was designed at APL, and will be flown
on the IMAGE/HENA instrument. Building on this past development, APL proposes
an advanced TOF chip, especially aimed at miniature particle instruments and
laser rangefinding.
Microsat Design Elements
Many proposed missions depend on the use of "microsatellite" constellations
to make simultaneous measurements at different orbital locations. Numerous new
technologies are required to make the microsat concept viable from a mass and
power standpoint. The purpose of this project is to develop CMOS circuitry that
can be inserted into the microsat development process, where appropriate, to
save mass and power. This circuitry would be available (as macrocells) for use
in other ASIC developments, or packaged as stand-alone parts.
Temperature Remote I/O Chip
(TRIO)
APL has developed a device, known as the TRIO (temperature remote I/O) chip,
which is intended to gather information from up to 16 separate temperature sensors,
digitize the measurement, and report the results to a master controller over
a standard I 2 C bus. The device requires little operating power to accomplish
this task, and saves spacecraft mass by reducing the overall cable length and
size necessary to connect the numerous temperature sensors to the spacecraft
electronics.
JPL has expressed interest in using the TRIO on the X2000,
and a contract is in final negotiation to support this work. To date, the TRIO
has undergone some testing at APL, but additional testing is required before
the device is considered flight ready. In addition, the X2000 Project has requested
that several improvements be made to the existing design, thus requiring that
a second-generation device be made.
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